AT32UC3B0256-A2UT

Product Summary

The AT32UC3B0256-A2UT is a complete System-On-Chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 60 MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The AT32UC3B0256-A2UT processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems.

Parametrics

AT32UC3B0256-A2UT absolute maximum ratings: (1)Operating Temperature: -40 to +85℃; (2)Storage Temperature: -60 to +150℃; (3)Voltage on GPIO Pins with respect to Ground: -0.3 to 5V; (4)Maximum Voltage on RESET_N Pin: 3.3V; (5)Maximum Operating Voltage (VDDCORE, VDDPLL): 1.95V; (6)Maximum Operating Voltage (VDDIO): 3.6V; (7)Total DC Output Current on all I/O Pin: 200 mA.

Features

AT32UC3B0256-A2UT features: (1)High Performance, Low Power AVR-32 UC 32-Bit Microcontroller: Compact Single-cycle RISC Instruction Set Including DSP Instruction Set; (2)Read-Modify-Write Instructions and Atomic Bit Manipulation; (3)Performing 1.38 DMIPS / MHz: Up to 75 DMIPS Running at 60 MHz from Flash; Up to 45 DMIPS Running at 33 MHz from Fash; (4)Memory Protection Unit; (5)Multi-hierarchy Bus System: High-Performance Data Transfers on Separate Buses for IIncreased Performance; (6)7 Peripheral DMA Channels Improves Speed for Peripheral Communication; (7)Internal High-Speed Flash; (8)256K Bytes, 128K Bytes, 64K Bytes Versions; (9)Single Cycle Access up to 30 MHz ; (10)Prefetch Buffer Optimizing Instruction Execution at Maximum Speed; (11)4ms Page Programming Time and 8ms Full-Chip Erase Time; (12)100,000 Write Cycles, 15-year Data Retention Capability; (13)Flash Security Locks and User Defined Configuration Area; (14)Internal High-Speed SRAM, Single-Cycle Access at Full Speed: 32K Bytes (256KB and 128KB Flash), 16K Bytes (64KB Flash); (15)Autovectored Low Latency Interrupt Service with Programmable Priority.

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