W77E516A40PL

Product Summary

The W77E516A40PL is a fast 8051 compatible microcontroller with a redesigned processor core without wasted clock and memory cycles. As a result, it executes every 8051 instruction faster than the original 8051 for the same crystal speed. Typically, the instruction executing time of W77E516A40PL is 1.5 to 3 times faster then that of traditional 8051, depending on the type of instruction. In general, the overall performance is about 2.5 times better than the original for the same crystal speed. Giving the same throughput with lower clock speed, power consumption has been improved. Consequently, the W77E516A40PL is a fully static CMOS design; it can also be operated at a lower crystal clock. The W78E516B40PL contains In-System Programmable (ISP) 64 KB Flash EPROM; 4KB auxiliary Flash EPROM for loader program; operating voltage from 4.5V to 5.5V; on-chip 1 KB MOVX SRAM; three power saving modes.

Parametrics

W77E516A40PL absolute maximum ratings: (1)DC Power Supply, VDD - VSS: +7.0 V; (2)Input Voltage, VIN: VDD +0.3 V; (3)Operating Temperature, TA: 0 to +70℃; (4)Storage Temperatute, Tst: -55 to +150℃.

Features

W77E516A40PL features: (1)8-bit CMOS microcontroller; (2)High speed architecture of 4 clocks/machine cycle runs up to 40 MHz; (3)Pin compatible with standard 80C52; (4)Instruction-set compatible with MCS-51; (5)64KB on-chip Flash-EPROM; (6)Four 8-bit I/O Ports; Port 0 has internal pull-up resisters enabled by software; (7)One extra 4-bit I/O port and Wait State control signal (available on 44-pin PLCC/QFP package); (8)Three 16-bit Timers; (9)12 interrupt sources with two levels of priority; (10)On-chip oscillator and clock circuitry; (11)Two enhanced full duplex serial ports; (12)64KB In-system Programmable Flash EPROM (APROM); (13)4KB Auxiliary Flash EPROM for loader program (LDROM); (14)256 bytes scratch-pad RAM; (15)1KB on-chip SRAM for MOVX instruction; (16)Programmable Watchdog Timer; (17)Dual 16-bit Data Pointers; (18)Software programmable access cycle to external RAM/peripherals.

Diagrams